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gray-code

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Tesina di Fondamenti di Elettronica Digitale, esercizio 3: progettazione completa di un sequenziatore numerico mediante MSF Moore, con codifica Gray degli stati, uscita BN, sintesi delle funzioni logiche, implementazione circuitale e simulazione.

  • Updated Feb 7, 2026

Dual-clock FIFO with a clock domain crossing subsystem, written in SystemVerilog. Gray code pointers pass through two-stage synchronizers, so the write and read sides run on unrelated clocks without metastability trouble. Full and empty flags and assertions are checked in multi-clock Verilator simulation.

  • Updated Nov 3, 2026

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